A route to chaos using FPGAs: Volume I: experimental observations (Record no. 5184)
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|---|---|
| fixed length control field | 01945nam a22002057a 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20241217162252.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 241217b |||||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9783319181042 |
| 040 ## - CATALOGING SOURCE | |
| Transcribing agency | National Institute of Technology Goa |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.3815 |
| Item number | MUR/ROU |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Muthuswamy, Bharathwaj |
| 110 ## - MAIN ENTRY--CORPORATE NAME | |
| Corporate name or jurisdiction name as entry element | Banerjee, Santo |
| 245 ## - TITLE STATEMENT | |
| Title | A route to chaos using FPGAs: Volume I: experimental observations |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 1st |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | New York: |
| Name of publisher, distributor, etc. | Springer, |
| Date of publication, distribution, etc. | 2015 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | xxiii, 222p.: 6x10x1; Hardcover |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc. | The purpose of this introductory book is to couple the teaching of chaotic circuit and systems theory with the use of field programmable gate arrays (FPGAs).<br/><br/>As such, it differs from other texts on chaos: first, it puts emphasis on combining theoretical methods, simulation tools and physical realization to help the reader gain an intuitive understanding of the properties of chaotic systems. Second, the "medium" used for physical realization is the FPGA. These devices are massively parallel architectures that can be configured to realize a variety of logic functions. Hence, FPGAs can be configured to emulate systems of differential equations.<br/><br/>Nevertheless maximizing the capabilities of an FPGA requires the user to understand the underlying hardware and also FPGA design software. This is achieved by the third distinctive feature of this book: a lab component in each chapter. Here, readers are asked to experiment with computer simulations and FPGA designs, to further their understanding of concepts covered in the book.<br/><br/>This text is intended for graduate students in science and engineering interested in exploring implementation of nonlinear dynamical (chaotic) systems on FPGAs. |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Source of heading or term | Electronic and Communication Engineering |
| Topical term or geographic name entry element | Electronic and Communication Engineering; Designing hardware for FPGAs; Chaotic ODEs: FPGA; bifurcations; Chaotic DDEs |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | Dewey Decimal Classification |
| Koha item type | Books |
| Suppress in OPAC | No |
| Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Home library | Current library | Shelving location | Date acquired | Source of acquisition | Cost, normal purchase price | Total checkouts | Full call number | Barcode | Date last seen | Price effective from | Koha item type | Public note |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Dewey Decimal Classification | Central Library NIT Goa | Central Library NIT Goa | General stacks | 16/12/2024 | All India Book House, Delhi | 9408.00 | 621.3815 BHA/ROU | 10931 | 17/12/2024 | 16/12/2024 | Books | Reference Book Rack number 37(A) & (B) | |||||
| Dewey Decimal Classification | Central Library NIT Goa | Central Library NIT Goa | General stacks | 16/12/2024 | All India Book House, Delhi | 9408.00 | 621.3815 BHA/ROU | 10932 | 17/12/2024 | 16/12/2024 | Books | Reference Book Rack number 39(A) & (B) |