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The Gm/iD methodology, a sizing tool for low voltage analog CMOS circuits : The semi - empirical and compact model approaches
Material type:
TextPublication details: Heildelberg Springer 2010Description: 171ISBN: - 9780387471006
- 621.38152 JES/THE
| Item type | Current library | Call number | Status | Barcode | |
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Central Library NIT Goa General stacks | 621.38152 JES/THE (Browse shelf(Opens below)) | Available | 6549 |
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| 621.38152 FLO/ELE Electronic devices: conventional current version | 621.38152 GUP/OPT Optoelectronic devices and systems | 621.38152 HUI/STE Analog circuit design: Scalable analog circuit design, high speed D/A converters, RF power amplifiers | 621.38152 JES/THE The Gm/iD methodology, a sizing tool for low voltage analog CMOS circuits : The semi - empirical and compact model approaches | 621.38152 KAN/LEB CMOS: digital integrated circuits analysis and design | 621.38152 KAN/LEB CMOS: digital integrated circuits analysis and design | 621.38152 KAN/LEB CMOS: digital integrated circuits analysis and design |
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